A microcode_ctl security update has been released for Fedora 38.

SECURITY: Fedora 38 Update: microcode_ctl-2.1-55.fc38

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Fedora Update Notification
FEDORA-2023-6846a1db56
2023-05-27 01:17:05.077104
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Name : microcode_ctl
Product : Fedora 38
Version : 2.1
Release : 55.fc38
URL : https://pagure.io/microcode_ctl
Summary : Tool to transform and deploy CPU microcode update for x86
Description :
The microcode_ctl utility is a companion to the microcode driver written
by Tigran Aivazian .

The microcode update is volatile and needs to be uploaded on each system
boot i.e. it doesn't reflash your cpu permanently, reboot and it reverts
back to the old microcode.

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Update Information:

- Update to upstream 2.1-40. 20230516 - Addition of 06-6c-01/0x10 (ICL-D B0)
microcode at revision 0x1000230; - Addition of 06-8f-04/0x87 (SPR-SP E0/S1)
microcode at revision 0x2b000461; - Addition of 06-8f-04/0x10 microcode at
revision 0x2c0001d1; - Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in
intel-ucode/06-8f-04) at revision 0x2b000461; - Addition of 06-8f-05/0x10
(SPR-HBM B1) microcode (in intel-ucode/06-8f-04) at revision 0x2c0001d1; -
Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-04) at
revision 0x2b000461; - Addition of 06-8f-06/0x10 (SPR-HBM B2) microcode (in
intel-ucode/06-8f-04) at revision 0x2c0001d1; - Addition of 06-8f-07/0x87
(SPR-SP E4/S2) microcode (in intel-ucode/06-8f-04) at revision 0x2b000461;
- Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-
ucode/06-8f-04) at revision 0x2b000461; - Addition of 06-8f-08/0x10 (SPR-HBM
B3) microcode (in intel-ucode/06-8f-04) at revision 0x2c0001d1; - Addition
of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-05) at
revision 0x2b000461; - Addition of 06-8f-04/0x10 microcode (in intel-
ucode/06-8f-05) at revision 0x2c0001d1; - Addition of 06-8f-05/0x87 (SPR-
SP E2) microcode at revision 0x2b000461; - Addition of 06-8f-05/0x10 (SPR-
HBM B1) microcode at revision 0x2c0001d1; - Addition of 06-8f-06/0x87
(SPR-SP E3) microcode (in intel-ucode/06-8f-05) at revision 0x2b000461; -
Addition of 06-8f-06/0x10 (SPR-HBM B2) microcode (in intel-ucode/06-8f-05)
at revision 0x2c0001d1; - Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode
(in intel-ucode/06-8f-05) at revision 0x2b000461; - Addition of
06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-05) at revision
0x2b000461; - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in intel-
ucode/06-8f-05) at revision 0x2c0001d1; - Addition of 06-8f-04/0x87 (SPR-SP
E0/S1) microcode (in intel-ucode/06-8f-06) at revision 0x2b000461; -
Addition of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-06) at revision
0x2c0001d1; - Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-
ucode/06-8f-06) at revision 0x2b000461; - Addition of 06-8f-05/0x10 (SPR-HBM
B1) microcode (in intel-ucode/06-8f-06) at revision 0x2c0001d1; - Addition
of 06-8f-06/0x87 (SPR-SP E3) microcode at revision 0x2b000461; - Addition
of 06-8f-06/0x10 (SPR-HBM B2) microcode at revision 0x2c0001d1; - Addition
of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-06) at
revision 0x2b000461; - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
intel-ucode/06-8f-06) at revision 0x2b000461; - Addition of 06-8f-08/0x10
(SPR-HBM B3) microcode (in intel-ucode/06-8f-06) at revision 0x2c0001d1; -
Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-07)
at revision 0x2b000461; - Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in
intel-ucode/06-8f-07) at revision 0x2b000461; - Addition of 06-8f-06/0x87
(SPR-SP E3) microcode (in intel-ucode/06-8f-07) at revision 0x2b000461; -
Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode at revision 0x2b000461;
- Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-
ucode/06-8f-07) at revision 0x2b000461; - Addition of 06-8f-04/0x87 (SPR-SP
E0/S1) microcode (in intel-ucode/06-8f-08) at revision 0x2b000461; -
Addition of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-08) at revision
0x2c0001d1; - Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-
ucode/06-8f-08) at revision 0x2b000461; - Addition of 06-8f-05/0x10 (SPR-HBM
B1) microcode (in intel-ucode/06-8f-08) at revision 0x2c0001d1; - Addition
of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-08) at revision
0x2b000461; - Addition of 06-8f-06/0x10 (SPR-HBM B2) microcode (in intel-
ucode/06-8f-08) at revision 0x2c0001d1; - Addition of 06-8f-07/0x87 (SPR-SP
E4/S2) microcode (in intel-ucode/06-8f-08) at revision 0x2b000461; -
Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode at revision 0x2b000461;
- Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode at revision 0x2c0001d1;
- Addition of 06-b7-01/0x32 (RPL-S S0) microcode at revision 0x113; - Addition
of 06-ba-02/0xc0 (RPL-H 6+8/P 6+8 J0) microcode at revision 0x4112; -
Addition of 06-ba-03/0xc0 (RPL-U 2+8 Q0) microcode (in intel-ucode/06-ba-02)
at revision 0x4112; - Addition of 06-ba-02/0xc0 (RPL-H 6+8/P 6+8 J0) microcode
(in intel-ucode/06-ba-03) at revision 0x4112; - Addition of 06-ba-03/0xc0
(RPL-U 2+8 Q0) microcode at revision 0x4112; - Addition of 06-be-00/0x01
(ADL-N A0) microcode at revision 0x10; - Addition of 06-9a-04/0x40 (AZB A0/R0)
microcode at revision 0x4; - Update of 06-55-03/0x97 (SKX-SP B1) microcode
from revision 0x100015e up to 0x1000171; - Update of 06-55-04/0xb7
(SKX-D/SP/W/X H0/M0/M1/U0) microcode from revision 0x2006e05 up to
0x2006f05; - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision
0x4003302 up to 0x4003501; - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1)
microcode from revision 0x5003302 up to 0x5003501; - Update of
06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002501 up to 0x7002601;
- Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd000375 up
to 0xd000390; - Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x3c
up to 0x3e; - Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision
0x20 up to 0x22; - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from
revision 0xb2 up to 0xba; - Update of 06-8a-01/0x10 (LKF B2/B3) microcode
from revision 0x31 up to 0x33; - Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1)
microcode from revision 0xa4 up to 0xaa; - Update of 06-8c-02/0xc2 (TGL-R
C0) microcode from revision 0x28 up to 0x2a; - Update of 06-8d-01/0xc2
(TGL-H R0) microcode from revision 0x40 up to 0x44; - Update of
06-8e-09/0x10 (AML-Y 2+2 H0) microcode from revision 0xf0 up to 0xf2; -
Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode from revision
0xf0 up to 0xf2; - Update of 06-8e-0b/0xd0 (WHL-U W0) microcode from revision
0xf0 up to 0xf2; - Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0,
WHL-U V0) microcode from revision 0xf0 up to 0xf6; - Update of
06-96-01/0x01 (EHL B1) microcode from revision 0x16 up to 0x17; - Update
of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision 0x421 up to
0x42a; - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in intel-
ucode/06-9a-03) from revision 0x421 up to 0x42a; - Update of 06-9a-03/0x80
(ADL-P 6+8/U 9W L0/R0) microcode (in intel-ucode/06-9a-04) from revision
0x421 up to 0x42a; - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from
revision 0x421 up to 0x42a; - Update of 06-9c-00/0x01 (JSL A0/A1)
microcode from revision 0x24000023 up to 0x24000024; - Update of
06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode from revision 0xf0 up to
0xf2; - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode from revision
0xf0 up to 0xf2; - Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode from
revision 0xf0 up to 0xf2; - Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0)
microcode from revision 0xf0 up to 0xf2; - Update of 06-9e-0d/0x22
(CFL-H/S/Xeon E R0) microcode from revision 0xf0 up to 0xf8; - Update of
06-a5-02/0x20 (CML-H R1) microcode from revision 0xf0 up to 0xf6; - Update
of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xf0 up to 0xf6; -
Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xf0 up to
0xf6; - Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xf0
up to 0xf6; - Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from
revision 0xf0 up to 0xf6; - Update of 06-a7-01/0x02 (RKL-S B0) microcode
from revision 0x54 up to 0x58; - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0)
microcode from revision 0x22 up to 0x2c (old pf 0x3); - Update of
06-97-05/0x07 (ADL-S 6+0 K0) microcode (in intel-ucode/06-97-02) from
revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-bf-02/0x07 (ADL C0)
microcode (in intel-ucode/06-97-02) from revision 0x22 up to 0x2c (old pf
0x3); - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-02)
from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-97-02/0x07 (ADL-
HX/S 8+8 C0) microcode (in intel-ucode/06-97-05) from revision 0x22 up to
0x2c (old pf 0x3); - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode from
revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-bf-02/0x07 (ADL C0)
microcode (in intel-ucode/06-97-05) from revision 0x22 up to 0x2c (old pf
0x3); - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-05)
from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-97-02/0x07 (ADL-
HX/S 8+8 C0) microcode (in intel-ucode/06-bf-02) from revision 0x22 up to
0x2c (old pf 0x3); - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
intel-ucode/06-bf-02) from revision 0x22 up to 0x2c (old pf 0x3); - Update of
06-bf-02/0x07 (ADL C0) microcode from revision 0x22 up to 0x2c (old pf 0x3);
- Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-bf-02) from
revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-97-02/0x07 (ADL-HX/S 8+8
C0) microcode (in intel-ucode/06-bf-05) from revision 0x22 up to 0x2c (old
pf 0x3); - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in intel-
ucode/06-bf-05) from revision 0x22 up to 0x2c (old pf 0x3); - Update of
06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-bf-05) from revision
0x22 up to 0x2c (old pf 0x3); - Update of 06-bf-05/0x07 (ADL C0) microcode
from revision 0x22 up to 0x2c (old pf 0x3). - Addresses CVE-2022-21216,
CVE-2022-33196, CVE-2022-33972, CVE-2022-38090
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ChangeLog:

* Thu May 25 2023 Eugene Syromiatnikov 2:2.1-55
- Update to upstream 2.1-40. 20230516
- Addition of 06-6c-01/0x10 (ICL-D B0) microcode at revision 0x1000230;
- Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode at revision
0x2b000461;
- Addition of 06-8f-04/0x10 microcode at revision 0x2c0001d1;
- Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in
intel-ucode/06-8f-04) at revision 0x2b000461;
- Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
intel-ucode/06-8f-04) at revision 0x2c0001d1;
- Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in
intel-ucode/06-8f-04) at revision 0x2b000461;
- Addition of 06-8f-06/0x10 (SPR-HBM B2) microcode (in
intel-ucode/06-8f-04) at revision 0x2c0001d1;
- Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
intel-ucode/06-8f-04) at revision 0x2b000461;
- Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
intel-ucode/06-8f-04) at revision 0x2b000461;
- Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
intel-ucode/06-8f-04) at revision 0x2c0001d1;
- Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
intel-ucode/06-8f-05) at revision 0x2b000461;
- Addition of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-05) at
revision 0x2c0001d1;
- Addition of 06-8f-05/0x87 (SPR-SP E2) microcode at revision
0x2b000461;
- Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode at revision
0x2c0001d1;
- Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in
intel-ucode/06-8f-05) at revision 0x2b000461;
- Addition of 06-8f-06/0x10 (SPR-HBM B2) microcode (in
intel-ucode/06-8f-05) at revision 0x2c0001d1;
- Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
intel-ucode/06-8f-05) at revision 0x2b000461;
- Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
intel-ucode/06-8f-05) at revision 0x2b000461;
- Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
intel-ucode/06-8f-05) at revision 0x2c0001d1;
- Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
intel-ucode/06-8f-06) at revision 0x2b000461;
- Addition of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-06) at
revision 0x2c0001d1;
- Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in
intel-ucode/06-8f-06) at revision 0x2b000461;
- Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
intel-ucode/06-8f-06) at revision 0x2c0001d1;
- Addition of 06-8f-06/0x87 (SPR-SP E3) microcode at revision
0x2b000461;
- Addition of 06-8f-06/0x10 (SPR-HBM B2) microcode at revision
0x2c0001d1;
- Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
intel-ucode/06-8f-06) at revision 0x2b000461;
- Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
intel-ucode/06-8f-06) at revision 0x2b000461;
- Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
intel-ucode/06-8f-06) at revision 0x2c0001d1;
- Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
intel-ucode/06-8f-07) at revision 0x2b000461;
- Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in
intel-ucode/06-8f-07) at revision 0x2b000461;
- Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in
intel-ucode/06-8f-07) at revision 0x2b000461;
- Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode at revision
0x2b000461;
- Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
intel-ucode/06-8f-07) at revision 0x2b000461;
- Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
intel-ucode/06-8f-08) at revision 0x2b000461;
- Addition of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-08) at
revision 0x2c0001d1;
- Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in
intel-ucode/06-8f-08) at revision 0x2b000461;
- Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
intel-ucode/06-8f-08) at revision 0x2c0001d1;
- Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in
intel-ucode/06-8f-08) at revision 0x2b000461;
- Addition of 06-8f-06/0x10 (SPR-HBM B2) microcode (in
intel-ucode/06-8f-08) at revision 0x2c0001d1;
- Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
intel-ucode/06-8f-08) at revision 0x2b000461;
- Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode at revision
0x2b000461;
- Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode at revision
0x2c0001d1;
- Addition of 06-b7-01/0x32 (RPL-S S0) microcode at revision 0x113;
- Addition of 06-ba-02/0xc0 (RPL-H 6+8/P 6+8 J0) microcode at revision
0x4112;
- Addition of 06-ba-03/0xc0 (RPL-U 2+8 Q0) microcode (in
intel-ucode/06-ba-02) at revision 0x4112;
- Addition of 06-ba-02/0xc0 (RPL-H 6+8/P 6+8 J0) microcode (in
intel-ucode/06-ba-03) at revision 0x4112;
- Addition of 06-ba-03/0xc0 (RPL-U 2+8 Q0) microcode at revision 0x4112;
- Addition of 06-be-00/0x01 (ADL-N A0) microcode at revision 0x10;
- Addition of 06-9a-04/0x40 (AZB A0/R0) microcode at revision 0x4;
- Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x100015e
up to 0x1000171;
- Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode from
revision 0x2006e05 up to 0x2006f05;
- Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003302
up to 0x4003501;
- Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision
0x5003302 up to 0x5003501;
- Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002501
up to 0x7002601;
- Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd000375
up to 0xd000390;
- Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x3c up
to 0x3e;
- Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x20 up
to 0x22;
- Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xb2
up to 0xba;
- Update of 06-8a-01/0x10 (LKF B2/B3) microcode from revision 0x31 up
to 0x33;
- Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode from revision
0xa4 up to 0xaa;
- Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x28 up
to 0x2a;
- Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x40 up
to 0x44;
- Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode from revision 0xf0
up to 0xf2;
- Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode from
revision 0xf0 up to 0xf2;
- Update of 06-8e-0b/0xd0 (WHL-U W0) microcode from revision 0xf0 up
to 0xf2;
- Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0)
microcode from revision 0xf0 up to 0xf6;
- Update of 06-96-01/0x01 (EHL B1) microcode from revision 0x16 up
to 0x17;
- Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision
0x421 up to 0x42a;
- Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in
intel-ucode/06-9a-03) from revision 0x421 up to 0x42a;
- Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in
intel-ucode/06-9a-04) from revision 0x421 up to 0x42a;
- Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x421
up to 0x42a;
- Update of 06-9c-00/0x01 (JSL A0/A1) microcode from revision 0x24000023
up to 0x24000024;
- Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode from
revision 0xf0 up to 0xf2;
- Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode from revision
0xf0 up to 0xf2;
- Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode from revision 0xf0
up to 0xf2;
- Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode from revision
0xf0 up to 0xf2;
- Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode from revision
0xf0 up to 0xf8;
- Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xf0 up
to 0xf6;
- Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xf0
up to 0xf6;
- Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xf0
up to 0xf6;
- Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xf0
up to 0xf6;
- Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision
0xf0 up to 0xf6;
- Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x54 up
to 0x58;
- Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode from revision
0x22 up to 0x2c (old pf 0x3);
- Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
intel-ucode/06-97-02) from revision 0x22 up to 0x2c (old pf 0x3);
- Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-02)
from revision 0x22 up to 0x2c (old pf 0x3);
- Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-02)
from revision 0x22 up to 0x2c (old pf 0x3);
- Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
intel-ucode/06-97-05) from revision 0x22 up to 0x2c (old pf 0x3);
- Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode from revision 0x22
up to 0x2c (old pf 0x3);
- Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-05)
from revision 0x22 up to 0x2c (old pf 0x3);
- Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-05)
from revision 0x22 up to 0x2c (old pf 0x3);
- Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
intel-ucode/06-bf-02) from revision 0x22 up to 0x2c (old pf 0x3);
- Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
intel-ucode/06-bf-02) from revision 0x22 up to 0x2c (old pf 0x3);
- Update of 06-bf-02/0x07 (ADL C0) microcode from revision 0x22 up to
0x2c (old pf 0x3);
- Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-bf-02)
from revision 0x22 up to 0x2c (old pf 0x3);
- Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
intel-ucode/06-bf-05) from revision 0x22 up to 0x2c (old pf 0x3);
- Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
intel-ucode/06-bf-05) from revision 0x22 up to 0x2c (old pf 0x3);
- Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-bf-05)
from revision 0x22 up to 0x2c (old pf 0x3);
- Update of 06-bf-05/0x07 (ADL C0) microcode from revision 0x22 up to
0x2c (old pf 0x3).
- Addresses CVE-2022-21216, CVE-2022-33196, CVE-2022-33972, CVE-2022-38090
--------------------------------------------------------------------------------

This update can be installed with the "dnf" update program. Use
su -c 'dnf upgrade --advisory FEDORA-2023-6846a1db56' at the command
line. For more information, refer to the dnf documentation available at
http://dnf.readthedocs.io/en/latest/command_ref.html#upgrade-command-label

All packages are signed with the Fedora Project GPG key. More details on the
GPG keys used by the Fedora Project can be found at
https://fedoraproject.org/keys
--------------------------------------------------------------------------------
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